The present invention relates to an active clamp circuit for a semiconductor device and, in particular, to an active clamp circuit which tracks the characteristics of a main power MOSFET to clamp just below the EPI breakdown voltage of the power MOSFET.
FIG. 1 shows an active clamp circuit 10 that includes a main power transistor Q1, i.e., a DMOS MOSFET, having source, drain, and gate terminals; a transistor Q2, e.g., bipolar, having collector, emitter, and base terminals; two series connected Zener diodes Z1 and Z2, with a cathode terminal of the Zener diode Z2 connected to an anode terminal of the Zener diode Z1; and a resistor R. The drain terminal of the main power transistor Q1 is connected to the collector terminal of the transistor Q2, a cathode terminal of the Zener diode Z1, and to a power source. The source terminal of the main power transistor Q1 is connected to a first terminal of the resistor R. The gate terminal of the main power transistor Q1 is connected to a second terminal of the resistor R and the emitter terminal of the transistor Q2. The base terminal of the transistor Q2 is connected to an anode terminal of the Zener diode Z2. The transistor Q1 switches power to a load, not shown.
When the Zener diodes Z1, Z2 avalanche, the active clamp circuit 10 clamps voltage at the gate terminal of the main power transistor Q1. As shown in FIG. 2, the clamp voltage is set at just below the EPI breakdown voltage of the main power transistor Q1. In FIG. 2 the EPI breakdown voltage is shown at approximately 45 volts, thus, the clamp voltage is somewhat below this voltage of 45 volts.
The clamp voltage of the active clamp circuit 10 is given by the following equation:nVz+VBE+Vgon=Vclamp.
The Zener diodes do not track the FET channel.